9th Asia and South Pacific Design Automation Conference 2004, Yokohama, Japan

Abbrevation

ASP-DAC

Link

http://www.aspdac.com/

City

Yokohama

Country

Japan

Deadline Paper

2003-07-16

Start Date

2004-01-27

End Date

2004-01-30

Abstract

ASP–DAC is the annual International Conference on Design Automation. Asia and South Pacific Region is one of the most active regions of design and fabrication of silicon chips in the world. The conference aims at providing the Asian and South Pacific CAD/DA and Design community with opportunities of interchanging ideas and collaboratively discussing the directions of the technologies related to Embedded System Design, System–on–a–Chip, Deep Submicron Technologies and a variety of New Applications. Keywords: System Level Design Methodology System LSI and SoC design methods, System specification, Specification languages, Design languages, Design reuse and IPs, Rapid prototyping, Low power system design, etc. Embedded and Real–Time Systems Co–simulation, Co–verification, Compilation techniques, Hardware–software co–design, Real–time OS and middleware, Design languages for embedded systems, etc. Behavioral/Logic Synthesis and Optimization Behavioral/RT synthesis, Optimization techniques in logic design, Library mapping, Interaction between logic design and layout, IP–core design, Sequential and asynchronous logic synthesis, Hardware algorithms, etc. Validation and Verification for Behavioral/Logic Design Logic simulation, Simulation engine, Symbolic simulation, Formal verification, Binary decision diagram, Equivalence checking, Transaction–level/RTL and gatelevel modeling and validation, etc. Optimization and Verification in Circuit and Chip Circuit modeling, Circuit simulation, Cell library characterization and generation, Circuit extraction, Verification, Circuit characterization, Clock/Power/Ground distribution, Signal integrity issues, etc. Performance Driven Physical Design Physical synthesis, Floor–planning, Bufier optimization and planning, Wire optimization and planning, Partitioning, Placement, Global/Detail routing, Module generation, New layout algorithms, Interconnect issues, etc. Test Technology and Design for Testability Test design, Test pattern generation, BIST, Fault simulation, Fault modeling, Test method for core–based design, Test issues on IP cores, Memory testing, LSI tester, etc. Analog and RF Circuit Design Analog circuit synthesis, Analog layout, Verification, Simulation techniques, Noise analysis, Analog circuit testing, Analog digital mixed design, etc. Design for Manufacturability (TCAD) Device modeling, Device simulation, Parameter extraction, Process modeling, Process simulation, Yield optimization, Device testing, etc. Reconfigurable Systems Field–programmable gate array (FPGA) design, FPGA design tools, Novel reconfigurable systems, Mapping techniques for reconfigurable systems, Application of recon figurable systems, etc. Leading–Edge Design Experiments Microprocessors, Digital signal processors, Design for multimedia, SoC, Design for Wireless communication, A/D mixed circuits, Memories, Sensors, MEMS chips, New applications, etc.