International Workshop on Power and Timing Modeling, Optimization and Simulation, 2003, Torino, Italien

The objective of the workshop is to provide a forum to discuss and investigate the emerging problems in the design methodologies and CAD&#8211;tools for the new generation of IC technologies&#046; A major emphasis of the technical program is on speed and low&#8211;power aspects with particular regard to modeling, characterization, design, and architectures&#046; <b>Keywords:</b> Low power design: high performance low power systems, ultra low power systems, special architectures&#046;<br>Modeling and synthesis: timing, power, low&#8211;voltage, interconnect, crosstalk&#046;<br>Timing design: clocking, synchronization, asynchronous and self timed systems, adiabatic switching&#046;<br>Optimization: low voltage low power logic families, logic parallelization, pipelining, fast low power arithmetic&#046;<br>Physical design: module generation, library optimization and characterization, area estimation&#046;<br>Physical test and characterization: low VT low voltage process, SOI, IDDQ, models and parameter extraction, experimental design for process control&#046;<br>Design methods and CAD tools: for low voltage low power design, high speed circuits&#046;<br>Trade&#8211;offs between devices, architectures and technologies, benchmark comparison&#046;