International Interconnect Technology Conference, San Francisco, Vereinigte Staaten

The IITC provides a forum for professionals in semiconductor processing, academia and equipment development to present and discuss exciting new science and technology through oral presentations, poster displays, exhibit booths and supplier seminars&#046; <b>Keywords:</b> Metallization: Metal deposition processes/equipment (PVD, CVD, ALD, electroplating) and materials characterization with particular emphasis on advanced aluminum and copper metallization&#046;<br>Dielectrics: Dielectric materials (low k, high k, ARCs, etc&#046;) and deposition processes (vapor deposition, CVD, spin&#8211;on, etc&#046;) for interconnect applications<br>Silicide and Salicide: Silicide materials, silicide deposition and formation processes, novel gate and source/drain structures, contact silicidation issues, etc&#046;<br>CMP/Planarization: Dielectric/Metal CMP processes, equipment and metrology issues&#046; Alternate planarization techniques&#046;<br>Dry Processing: Dry etching of vias, trenches and damascene structures, dry etching of metal, dry cleaning processes, plasma induced damage, etc&#046;<br>Process Integration: Multilevel interconnect processes, clustered processes, novel interconnect structures, contact/via integration, metal barrier and materials interface issues, etc&#046;<br>Interconnect Systems: Interconnect performance modeling and high frequency characterization, interconnect system integration and advanced packaging concepts (flip&#8211;chip, chip&#8211;on&#8211;chip, MCM, etc&#046;), novel architectures and advanced interconnect concepts (optical, superconductors, etc&#046;)&#046;<br>Process Control/Modelling: CMP, metal/dielectric deposition and etching processes, PVD, CVD, electroplating, etc&#046;<br>Reliability: Metal electromigration and stress voiding, dielectric integrity and mechanical stability, thermal effects, passivation issues, interconnect reliability prediction/modeling&#046;<br>System&#8211;on&#8211;a&#8211;Chip: Interconnect, design and processing of SOC; embedded memory processing, materials and integration; RF and high frequency passive components; noise and cross&#8211;talk issues&#046;