Abbrevation
FPGA/PLD
City
Yokohama
Country
Japan
Deadline Paper
Start Date
End Date
Abstract

The FPGA/PLD Design Conference, Japan’s only conference taking up the theme of FPGA/PLD, is held in conjunction with the Electronic Design and Solution Fair, which provides a forum to exchange ideas and promote research in the fields of device technology, design technology, EDA support tools and applications for FPGA/PLD&#046; <b>Keywords:</b> Killer applications using FPGA/PLD, Applications using FPGA/PLD, Circuit design technology (high&#8211;speed I/O, high&#8211;density circuits, etc&#046;), CAD/DA technologies (usage of conventional and new CAD/DA technologies), Development support technologies with FPGA/PLD&#8211;compatible IP, System&#8211;on&#8211;Chip (SoC) development using IP or VSI, and related development support technologies, Usage of FPGA/PLD with embedded cores, Emulation technologies and rapid prototyping, Compiler technologies for embedded systems, Reconfigurable computing, Software/hardware design, FPGA/PLD device architectures, Evolving hardware, Other topics related to FPGA/PLD