Abbrevation
ICCAD
City
San Jose
Country
United States
Deadline Paper
Start Date
End Date
Abstract

<P>The International Conference on Computer Aided Design (ICCAD) offers a place for CAD developers and IC designers to meet and exchange ideas about the problems and solutions in the era of system&#8211;on&#8211;a&#8211;chip&#046; </P> <P><B>Keywords:</B> PHYSICAL DESIGN AND TEST <BR>Placement and floorplanning techniques&#046; RTL area estimation&#046; Partitioning for layout&#046; Timing&#8211;driven and noise avoidance routing&#046; Automatic special net routing&#046; Layout for manufacturability&#046; Routing estimation&#046; Module generation and layout synthesis&#046; Layout migration&#046; Symbolic design &amp; compaction&#046; Physical design planning&#046; Layout verification&#046; Analog, RF, and mixed signal circuit synthesis, optimization and layout&#046; Analog, RF and mixed signal simulation techniques&#046; Mixed technology design simulation (thermal, packaging, micromechanical)&#046; Testing&#046; Yield and manufacturability analysis&#046; Fault modeling, delay test, analog and mixed signal test&#046; Fault simulation&#046; ATPG&#046; BIST and DFT&#046; Memory, core and system test&#046; <BR><BR>SYNTHESIS AND SYSTEM DESIGN<BR>Combinational and sequential logic synthesis&#046; Optimization for area, timing, power&#046; FPGA optimization&#046; Interaction between layout and logic synthesis&#046; Technology mapping&#046; Asynchronous circuit design&#046; High&#8211;level synthesis&#046; Datapath and control synthesis&#046; Synthesis with IP libraries and reuse&#046; Estimation and analysis in high&#8211;level synthesis&#046; Memory system synthesis and optimization&#046; HW interface synthesis&#046; HW/SW co&#8211;synthesis&#046; System synthesis&#046; Hardware platform synthesis and optimization&#046; ASIP synthesis&#046; Core based design&#046; Embedded software synthesis&#046; HW and SW estimation and analysis&#046; Interface synthesis&#046; Specification, modeling and validation of embedded systems&#046; Real&#8211;time software and RTOS&#046; System level reuse techniques&#046; Embedded systems engineering Rapid system prototyping&#046; <BR><BR>VERIFICATION, MODELING AND SIMULATION <BR>Interconnect parameter extraction and circuit model generation, Signal integrity analysis&#046; Power/Ground network analysis, Gate, switch, and circuit level timing and power analysis, Formal verification techniques, HW/SW co&#8211;simulation, Switch, logic and behavioral simulation and design validation&#046; Software verification&#046; <BR><BR>INNOVATIVE DESIGN TECHNOLOGIES FOR DEVICES, CIRCUITS AND SYSTEMS <BR>New concepts and open problems in layout, circuit, logic and system design&#046; SoC architectures including memory, processor, communication structures and programmable platforms, Design fabrics: special layout, circuit, and system architectures for low&#8211;power, performance, configurability, variability, and reliability, Design and analysis for manufacturability, reliability, and robustness, Emerging technologies&#046; Modeling, simulation and analysis for new device structures&#046; Nanotechnology, MEMS, molecular and bioelectronics, single electron and optical/photonic devices and circuits&#046;</P>