Practicing design engineers and industry professionals meet to discuss and find practical solutions to the EDA and semiconductor industry′s most complex challenges at DesignCon East.<br>This technical engineering conference includes 24 comprehensive educational sessions focusing on techniques, interactive panels with recognized leaders in the industry, and product demonstrations and exhibits that address the development and improvement of chip–level systems and manufacturing processes.<br>Engineers can select from conference tracks on High–Performance System Design and System–on–Chip and ASIC Design. <b>Keywords:</b> Functional Verification/Validation<br>Acceleration techniques, Application–specific processor design verification, Assertion–based verification, Asynchronous co–design, Debugging, Formal verification, Functional coverage, Hardware/software co–verification, Mixed–signal, RF, Partitioning, Prototyping<br>Low–Power System Architecture<br>Clocking, Implementation efficiency, Hardware vs. software, Leakage management, Low–power instruction sets, Multivoltage systems<br>Advanced System Design (including embedded software & analog, RF, packaging)<br>Cost efficiency, Data management & consistency, Design methodologies & management, Case studies, Distributed teams, Outsourcing, Hierarchical design, High–level design languages, IP cores, Nanotechnology, Platform–based design, Reconfigurable design, Reusability, System simulation and validation (inc. human interface, physical channels), System partitioning<br>Physical Design (on–chip)<br>Crosstalk, Interconnect, Leakage, Measurement, Mixed–signal, RF design, Modeling & simulation, Signal integrity, Timing closure, Physical timing closure, RT level<br>Test & Debug<br>Automatic test pattern generation, Design–for–test, Fault modeling, Self test & self repair, System redundancy, Test coverage, Testing gigabit I/O<br>High–Speed, High–Performance System Design<br>10–40 Gbps design, Bus architecture physical design, Chip & system co–design, Design impacts of board materials, EMI effects, High data–throughput on copper, Interconnect, Cables & connectors, IC packaging, PCB, Via hole, Jitter, Measurement, Mixed–signal, RF design, Modeling & simulation, Open, scalable architectures, Optical designs, parallel optical modules, SerDes design techniques, Signal conditioning, Signal integrity, Crosstalk, Single–ended vs. differential I/O, Standards, Power distribution modeling, Power supply integrity<br>Automotive System Design Challenges<br>Wireless Design Challenges<br>
Abbrevation
DesignCon East
City
Marlborough
Country
United States
Deadline Paper
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