EuroDesignCon is an educational forum for practicing engineers—and the managers who guide their work—in the European semiconductor and electronic design community. The Euro DesignCon technical program is directed toward the needs of engineers concerned with high–performance system design, low–power design, hardware–dependent software engineering, fabless design, chip and system integration, and design verification, in applications such as automotive electronics, wireless communication systems, and consumer electronics. <b>Keywords:</b> Functional Verification/Validation<br>Acceleration techniques, Application–specific processor design verification, Assertion–based verification, Asynchronous co–design, Debugging, Formal verification, Functional coverage, Hardware/software co–verification, Mixed–signal, RF, Partitioning, Prototyping<br>Low–Power System Architecture<br>Clocking, Implementation efficiency, Hardware vs. software, Leakage management, Low–power instruction sets, Multivoltage systems<br>Advanced System Design (including embedded software & analog, RF, packaging)<br>Cost efficiency, Data management & consistency, Design methodologies & management, Case studies, Distributed teams, Outsourcing, Hierarchical design, High–level design languages, IP cores, Nanotechnology, Platform–based design, Reconfigurable design, Reusability, System simulation and validation (inc. human interface, physical channels), System partitioning<br>Physical Design (on–chip)<br>Crosstalk, Interconnect, Leakage, Measurement, Mixed–signal, RF design, Modeling & simulation, Signal integrity, Timing closure, Physical timing closure, RT level<br>Test & Debug<br>Automatic test pattern generation, Design–for–test, Fault modeling, Self test & self repair, System redundancy, Test coverage, Testing gigabit I/O<br>High–Speed, High–Performance System Design<br>10–40 Gbps design, Bus architecture physical design, Chip & system co–design, Design impacts of board materials, EMI effects, High data–throughput on copper, Interconnect, Cables & connectors, IC packaging, PCB, Via hole, Jitter, Measurement, Mixed–signal, RF design, Modeling & simulation, Open, scalable architectures, Optical designs, parallel optical modules, SerDes design techniques, Signal conditioning, Signal integrity, Crosstalk, Single–ended vs. differential I/O, Standards, Power distribution modeling, Power supply integrity<br>Automotive System Design Challenges<br>Wireless Design Challenges<br>
Abbrevation
EuroDesignCon
City
München
Country
Germany
Deadline Paper
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