Abbrevation
IWLS
Link
City
Temecula
Country
United States
Deadline Paper
Start Date
End Date
Abstract
The International Workshop on Logic and Synthesis provides an international forum to promote research and exchange ideas about all aspects of integrated circuit and system synthesis, optimization, and verification. The workshop encourages early dissemination of ideas and results. Accepted papers are distributed only to IWLS participants. <b>Keywords:</b> architectures and compilation, synthesis and optimization, power and timing analysis, design validation and verification, and design experiences, all applied at system description levels ranging from transistor–level to hardware–software interfaces. Implementation might be in synchronous or asynchronous CMOS, or any emerging technology.