The aim of establishing this conference in Europe in close co–operation with IEEE–CPMT is to provide an additional platform for worldwide networking between European engineers and scientist and their colleagues from other continents.<br>The ESTC comprises papers and topics covering a wide spectrum of the latest developments in all areas of micro– and nanosystems technology – e.g. assembly, packaging, system on package, quality and reliability, materials, optoelectronics, nano and bio packaging, and simulation. <b>Keywords:</b> Advanced Packaging:<br>New packaging technologies, systems packaging, designs, materials, and configurations addressing performance, density and thermal management for single chip, multichip, wafer–level, MEMS and power packages. Special emphasis on flip–chip, fine pitch and high lead count packaging in CSP, BGA, CGA, LGA and SMT packages, SiP and SoP solutions.<br>Materials & Processing:<br>Processes for IC Packaging that enhance performance (mechanical and electrical) and cost effectiveness. Technology, development and application of adhesives, encapsulants, chip underfills, solders and alloys, magnetic and optical materials, ceramics, composites, dielectrics, thin films, nanomaterials, thermal materials, bonding and plating processes.<br>Optoelectronics:<br>Packaging for fiber–optic modules, infra–red wireless, consumer optoelectronics, flat–panel, projection and microdisplays, solid state lighting, optical amplifiers, lasers, detectors, OEICs, optical data interconnect, optical backplanes, passive components, and WDMs, OLEDs.<br>Manufacturing Technology:<br>Advanced process development and equipment improvement. Emphasis on product level integration and optimization for different product applications, cost, yield, performance and environmental improvements, process characterization, new product introduction and ramp–up, design for flexible manufacturing and testing for wafer thinning, bumping, stacking, low–k chip packaging, high–density interconnect and embedded component substrates, testing and burn–in, design for manufacturing.<br>Microsystems Packaging:<br>MEMS, sensors and actuators packaging. First–level electronic interconnection technologies, including flip–chip, 3D interconnect, lead–free interconnects, wire–bonding, TAB, and conductive polymers, under bump metallurgy, substrate metallurgy and interconnect, wafer and device level interconnection, electrical issues of advanced interconnect structures, novel interconnects.<br>Electrical Modelling:<br>Electrical modelling, simulation and characterization of packaging solutions including system–level applications. Broadband measurement, interconnect modelling, power distribution, non–linear modelling and analysis, radiation and interference, simulation techniques for 2D and 3D interconnect structures, mixed signal modelling, EMC/EMI.<br>Thermal–Mechanical Modelling:<br>Thermal and mechanical modelling, simulation and charcterization of packaging solutions including system–level applications. Prediction of thermal and mechanical performance of packages and modules. Thermal design. Material properties. Combined experimental–simulated approaches.<br>Emerging Technologies:<br>Nano–Scale Packaging, micro–to–nano transition and interfaces. Packaging of nano–scale electronic and sensing devices. Nano–materials, nano–imprinting, nano–interconnections, and characterization. Nano–electro–mechanical systems (NEMS). Packaging of biomedical devices. Microfluidic devices. Biocompatible materials. Integrated biotech devices using sample preparation, processing and data communication, test procedures and results.<br>Quality & Reliability:<br>Assessment, first level / second level, processability and technical reliability, interfaces, metallurgical design for reliability, failure analysis, test methods and data analysis, failure and acceleration models, qualification of components and systems, KGD, incremental quality improvement, and TQM. Physics of failures. reliability of lead–free interconnects, life time prediction, electromigration of bumped interconnects.<br>Passive Components:<br>New component technologies, integrated embedded components, Polymer Thick Film, RF and wireless component applications, component performance, systems, and reliability, Pb–free compatibility, passive components for power electronics.
Abbrevation
ESTC
City
Dresden
Country
Germany
Deadline Paper
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End Date
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