The 9th Annual International MAPLD Conference will address new developments on programmable logic devices and technologies, digital engineering, computing and related fields for military and aerospace applications. Papers are invited on a wide range of topics such as technologies, devices, processors, systems, high performance computers, logic design, reconfigurable computers, programming tools, standards, applications (e.g., flight, encryption, communications), fault tolerance, reliability, and radiation susceptibility. We are planning an exciting program with presentations by Government, industry, academia, and consultants, including talks by distinguished Invited Speakers.This conference is open to US and foreign participation and is unclassified. For related information, please see the NASA Office of Logic Design Web Site (http://klabs.org). <b>Keywords:</b> War Stories″ and Lessons Learned<br>Non–volatile, erasable memory technology<br>Design verification and validation<br>Reliability and fault tolerance with FPGAs<br>General–purpose, high–performance, PLD–based computing systems and applications<br>Reliability and Programmable Devices<br>FIT rates and test vehicles<br>New technology qualification<br>Digital Device Obsolescence<br>High performance reconfigurable computers<br>Implementing high reliability processor cores in FPGAs<br>Software tools<br>Checks for low reliability design constructs<br>PLD tools/methods that we need but vendors don′t supply<br>Experiences with reconfigurable computing programming tools Standards issues, portability issues and tool issues (e.g., OpenFPGA approaches) related to FPGA boards and reconfigurable computing systems<br>
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MAPLD
City
Washington D.C
Country
United States
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