International Test Conference 2006, Santa Clara, Vereinigte Staaten

Abbrevation

ITC

Link

http://www.itctestweek.org/

City

Santa Clara

Country

United States

Deadline Paper

2006-02-17

Start Date

2006-10-24

End Date

2006-10-26

Abstract

International Test Conference is the world′s premier conference dedicated to the electronic test of devices, boards and systems—covering the complete cycle from design verification, test, diagnosis, failure analysis and back to process and design improvement. At ITC, test and design professionals can confront the challenges the industry faces, and learn how these challenges are being addressed by the combined efforts of academia, design tool and equipment suppliers, designers, and test engineers. ITC, the cornerstone of the Test Week™ event, offers a wide variety of technical activities targeted at test and design theoreticians and practitioners, including formal paper sessions, tutorials, panel sessions, case studies, lecture and application series, commercial exhibits and presentations, and a host of ancillary professional meetings. Keywords: * Adaptive Test * BIST or Embedded Test–Chip and Board * Bring–up Test and Debug * Design Validation * Design and Test for Reliability * Experiments and Case Studies * High–Speed Digital Test * Low–Cost Test/ATE * Test and Post–Test Data Analysis * RF Testing * Test and Design for Manufacturability * Test for Nanometer Technologies * Test for Yield–Learning * Test Resource Partitioning * Board and System Test * Defect–based Testing * On–line Test * Practical Test Engineering * ATE Hardware and Software * ATPG, Test Synthesis * Boundary–Scan * Design–for–Test: Chip, Board, System * Economics of Test * FPGA Test * IDDQ and Current Test * Interface Issues * Loadboard Design and Simulation * MCM and KGD Test * Memory Test * Microprocessor Test * Mixed–Signal and Analog Test * Multisite Testt * Production Test Automation * System–on–Chip Test * Test Standards * Test Effectiveness * Wafer Probe