Workshop on RTL and High Level Testing, Beijing, China

The purpose of this workshop is to bring researchers and practitioners on LSI testing from all over the world together to exchange ideas and experiences on register transfer level (RTL) and high level testing&#046;<br>WRTLT&#8242;07, the eighth workshop, will be held in conjunction with the 16th Asian Test Symposium (ATS&#8242;07) in Beijing, China&#046; We hope and expect this workshop provides an ideal forum for frank discussion on this important topic for the future system&#8211;on&#8211;a&#8211;chip (SoC) devices&#046;<br><b>Keywords:</b> Functional fault modeling<br>RTL ATPG<br>RTL DFT<br>RTL BIST<br>Relationship between RTL and gate level testing<br>High level test bench generation<br>Design verification<br>High level approaches for testing<br>SoC Testing<br>Microprocessor testing<br>