Effective compilers allow more efficient execution of application programs on a given computer architecture. On the other hand, well–conceived architectural features can support more effective compiler optimization techniques. Good interaction between compilers and computer architectures is key to successful design of highly efficient and effective computer systems. This workshop is to promote new ideas and present recent developments in compiler techniques and computer architectures that enhance each other′s capabilities and performance. Papers are solicited on any aspect of interaction between compilers/software tools and architectures in the design of general–purpose and embedded microprocessors, multiprocessors, and other parallel computer systems. <b>Keywords:</b> * Processor reliability enhancement<br>* Improved timing analysis and predictability<br>* Secure, dependable computing<br>* Managed and unmanaged run–time support<br>* Dynamic compilation and optimization<br>* Task synchronization and scheduling<br>* System virtualization<br>* Efficient I/O support<br>* Parallelism enhancement and exploitation<br>* Memory, cache, and register management<br>* Multi–core software and compilation<br>* Code optimization and generation<br>* Low power architecture and software<br>* Debugging, verification and validation<br>
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INTERACT
City
Phoenix
Country
United States
Deadline Paper
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Abstract