Microsystem design, manufacturing, assembly and packaging technology is playing a key technology for the progress of the microsystems and microelectronics industry in the world. China is not an exception. Therefore, many multi–national companies are establishing new facilities in China for expanding their global business and interest. Following the successful previous conferences, we are proud to announce the 8th International IEEE CPMT Symposium on High Density Microsystem Design and Packaging and Component Failure Analysis in Electronics Manufacturing (HDP´06). <b>Keywords:</b> High density design and packaging including micro– and nanosystems, microelectronics and optoelectronics design and packaging, SOP, SOP, SIP, CSP, BGA, Flip–chip, Chip on Board, lead and halogen free, Surface Mount Technology and other novel emerging technology<br>· High density substrate including integrated passives and active devices<br>· MEMS and MOEMS design, packaging and assembly<br>· Microsystems manufacturing issues including cleaning issues, quality control, logistics, repair, process optimization, statistic process controls, ISO compliance, tooling or equipment, early manufacturing involvement initiatives and yield and test innovations used to enhance manufacturing processes or products related to high density substrates, single chip and multichip packaging, chip bumping and integrated component technologies<br>· Component failure analysis techniques including non–destructive X–ray, ultrasonic microscopy, IR–microscopy etc<br>· Simulation and modelling for packaging and microsystems and microelectronics manufacturing processes<br>· Thermal management<br>· Environmental design and materials development including life cycle analysis and end of life strategy etc<br>· Cost reengineering, improvements and analysis for electronics packaging processes and products<br>
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HDP
City
Shanghai
Country
China
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