This joint–conference is a forum for researchers and designers to present and discuss various aspects of VLSI design, electronic design automation (EDA), enabling technologies, and embedded systems. It covers the entire spectrum of activities in the two vital areas of VLSI and embedded systems, which underpin the semiconductor industry. The five–day program will consist of regular paper sessions, special sessions, embedded tutorials, panel discussions, design contest, industrial exhibits and two days of tutorials. <b>Keywords:</b> VLSI – Gigascale design methodology, processor and memory design, analog–digital–RF mixed signal SoC, concurrent interconnect, package and board design, low–power design, asynchronous design, physical design, impact of process technology on design, defect tolerant architectures, synthesis, test and DFT, formal verification, mixed signal–mixed domain CAD, Issues in nano–CMOS technologies, non–classical CMOS, non–CMOS devices, phase change memory, technology modeling–design–simulation, gigascale integrated circuit manufacturing, reliability, MEMS, CMOS sensors, CAD/EDA methodologies for nanotechnology design flows, EDA tool issues in deep sub–micron design. Embedded Systems – Embedded system hardware/software co–design, reconfigurable hardware design, FPGA/ASIC–based design, DSP, communications, encryption, security, compression, digital imaging, hybrid systems–on–chip, sensor networks, programmable devices, hardware–software co–design and co–verification
Abbrevation
VLSI-Design/ES
City
Bangalore
Country
India
Deadline Paper
Start Date
End Date
Abstract