The first workshop, held at Georgia Tech in September 2005, was highly successful with industry keynote talks from TI, IBM , Intel, Philips and Skyworks. More than 80 people attended the workshop from Japan , Korea , Europe and the U.S.<br>The focus of the second workshop will explore current trends and state–of–the–art “3S” technologies and applications of “on–chip” SOC , “on–module” SIP and “on–system” SOP. Electronics package integration is taking place by means of either on–wafer or on–ceramic LTCC or organic laminate technologies. The tradeoffs between these are also of interest. This workshop will review the latest design, R & D and manufacturing status as well as applications of each of the three electronic packaging technologies currently being used around the world. It will also attempt to compare and contrast SOC , 3D stacking, SIP, SOP and MCM as related to distinct application sectors .<br><b>Keywords:</b> 3S Technologies & Applications in:<br>Automotive, Computing, Consumer & Wireless, Military & Defense, & Bio–Medical Systems<br>SOC / SIP / SOP Topics on:<br>Design, Materials, Fabrication, Assembly, and Process Technologies<br>Specific Topics:<br>Mixed Signal Design and Design Tools<br>Embedded Digital Integration and Modules<br>Multifunction Integration and Modules<br>3D Stacked ICs and Packages<br>Embedded Passives<br>Bio SIP<br>Embedded RF Integration and Modules<br>Materials, Processes, Fabrication and Assembly<br>Embedded Optical integration and modules<br>High Density Interconnects, HDI<br>Core and Coreless Substrates<br>Bio Wireless Sensing<br>Mixed Signal Test<br>Mixed Signal Reliability<br>
Abbrevation
3S
City
Atlanta
Country
United States
Start Date
End Date
Abstract