The System Level Interconnect Prediction (SLIP) Workshop focuses on modeling and prediction of usable properties of optimized interconnect systems and their impact on system performance. Both theory and applications of interconnect prediction techniques are highlighted, with emphasis on applications to architectural and micro–architecture exploration, physical design, interconnect technology planning and communication networks. In addition to the presentation of state–of–the–art papers in these fields, invited talks and tutorials by leading researchers aim to encourage dialogue between the architecture, physical design, and interconnect technology communities.<br><b>Keywords:</b> Interconnect prediction methodology:<br>– Statistical properties of complex interconnect systems<br>– Techniques and calibrations for ″Rentian″ and ″non–Rentian″ interconnect estimation<br>– A priori, on–line, and a posteriori estimation of interconnect design parameters (wire length, area, power, delay, etc.)<br>Applications in system design:<br>– Interconnect parameter and yield estimation for use in architecture design and CAD<br>– Interconnect planning flows for specific objectives (e.g., low power, high performance) or target technologies (e.g., ASIC/SoC, FPGA, System–in–package, 3–D integration, molecular/nanoelectronics)<br>Applications in technology evaluation:<br>– Interconnect technology prediction for long–term industry roadmap projections<br>– Early (predictive) evaluation of novel interconnect technologies in a system′s context<br>– Architectural and micro–architectural effects of interconnect optimization approaches<br>
Abbrevation
SLIP
City
Austin
Country
United States
Deadline Paper
Start Date
End Date
Abstract