Troubleshooting how and why circuits and systems fail is important and is rapidly growing in industry significance. Debug and diagnosis may be needed for yield improvement, process monitoring, debugging the design function, failure mode learning for R&D, or just getting a working first prototype. But the detective work can become tricky. Sources of difficulty include, circuit complexity, packaging, physical access, shortened product creation cycle, the traditional focus on just pass/fail testing and missing tool and equipment capabilities. New and efficient solutions for debug and diagnosis will have a much needed and highly visible impact on productivity. The mission and objective of the SDD06 Workshop is to consider all issues related to debug and diagnosis of circuits and systems – from prototype bring–up to volume production.<br><b>Keywords:</b> Debug Techniques and Methodologies<br>Structured Debug Architectures<br>Infrastructure IP for SDD<br>Design/Synthesis for Debug<br>Microprocessor Debug<br>Debug for FPGAs<br>Reuse of DFT for Debug and Diagnosis<br>Debug of Embedded Cores/SoCs<br>Digital/analog Turn–on<br>Methods & Tools<br>System Level Debug & Diag<br>Equipment Impact and Techniques<br>Manufacturing & Prototype Environment<br>Silicon Debug Standardization<br>Case Studies<br>
Abbrevation
SDD
City
Freiburg
Country
Germany
Deadline Paper
Start Date
End Date
Abstract