Electronic circuits running in the multi–GHz clock range and/or including I/O capable of multi–Gbps data rates are now increasingly common. The characterization, production testing, and diagnosis of such circuits pose significant challenges. GTW’07 is a workshop sponsored by the IEEE Computer Society Test Technology Technical Council that specifically addresses problems and solutions related to ATE and test methodologies concerning issues that arise with circuits running at such GHz clock and/or Gbps data rates. GTW′07 will offer a focused forum for experts, as well as for members of the community with a particular interest in this rapidly expanding specialized field. <b>Keywords:</b> • Tester architecture and circuitry to provide and support high–speed analog signal sourcing/generation and response capture/sampling<br>• Embedded and external (hybrid) schemes and circuits for sourcing and capturing high speed signals<br>• Low bandwidth/Low–cost testing/testers of GHz/Gpbs circuits<br>• BIT/BIST for GHz/Gbps circuits<br>• Passive and active loopback testing<br>• Jitter generation and analysis techniques, using embedded, external, and hybrid circuitry<br>• Driving and measuring specifications of I/Os with differential signaling<br>• High–speed/multi–channel test problems and solutions (test fixturing, noise, signal integrity etc)<br>• On–chip infrastructure IP for accurate on–chip timing, voltage, and current measurements<br>• Noise modeling and characterization of channels, cabling, sources,<br>receivers, etc.<br>• Device interface circuitry, and tradeoffs in accuracy and bandwidth<br>• Tradeoffs between yield, ATE overall timing accuracy (OTA), test environment specifications, and I/O timing specifications<br>• DFT and design for manufacturing (DFM) of Gbit/s I/Os<br>• High–speed I/O test power management<br>• Test stimulus and response data transfer and processing for go/no–go testing and diagnosis<br>
Abbrevation
GTW
City
Póvoa de Varzim
Country
Portugal
Deadline Paper
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End Date
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