The International Engineering Consortium is pleased to announce this Call for Papers for DesignCon 2008, the premier educational conference and technology exhibition for semiconductor and electronic design engineers. At DesignCon, engineers talk to engineers to find practical solutions to the challenging problems they share in design and verification. We emphasize education and peer–to–peer sharing among practicing engineers, creating a unique atmosphere for learning about state–of–the–art design methodologies and technologies. Individuals presenting papers at DesignCon will join an elite group offering leading–edge case studies, technology innovations, practical techniques, design tips, and application overviews. <b>Keywords:</b> 1. Chip–Level Architectural and Functional Design<br>2. Functional and Performance Verification<br>3. Chip–Level Physical Design and DFM<br>4. Chip–Level Electrical and Package Design<br>5. PCB and Passive Component Technology<br>6. High–Speed Parallel Interface Design<br>7. Multi–Gigabit Serial Interconnects<br>8. High–Speed Timing, Jitter, and Noise<br>9. High–Speed Signal Processing, Equalization and Coding<br>10. Power Integrity and Power–Aware Design<br>11. Electromagnetic Compatibility and Interference<br>12. Test Fixturing and Measurement Methodology<br>13. RF and Signal Integrity<br>14. Chip/Package/Board/System Co–Design<br>15. Business and Engineering Impacts<br>
Abbrevation
DesignCon
City
Santa Clara
Country
United States
Deadline Paper
Start Date
End Date
Abstract