3-D Architectures for Semiconductor Integration and Packaging, Burlingame, Vereinigte Staaten

Abbrevation

TECHVENTURE

Link

http://techventure.rti.org/fall2007/

City

Burlingame

Country

United States

Start Date

2007-10-22

End Date

2007-10-24

Abstract

<SPAN lang=EN–US style=″FONT–SIZE: 9pt; FONT–FAMILY: Verdana; mso–bidi–font–family: ′Times New Roman′; mso–font–kerning: 1.0pt; mso–fareast–font–family: 宋体; mso–ansi–language: EN–US; mso–fareast–language: ZH–CN; mso–bidi–language: AR–SA; mso–bidi–font–weight: bold″>The year′s 2007 conference3–D Architectures for Semiconductor Integration and Packaging, will provide attendees and speakers the unique opportunity to explore and understand the technology and business implications of the trend toward 3–D device architectures in the semiconductor industry. With presentations and participants from leading companies and organizations in the international community, the conference is aimed at providing information that is critical to planning ongoing and future business and technical efforts that are impacted by the emerging capabilities of 3–D integration and packaging. <SPAN lang=EN–US style=″FONT–SIZE: 9pt; FONT–FAMILY: Verdana; mso–bidi–font–family: ′Times New Roman′; mso–font–kerning: 1.0pt; mso–fareast–font–family: 宋体; mso–ansi–language: EN–US; mso–fareast–language: ZH–CN; mso–bidi–language: AR–SA; mso–bidi–font–weight: bold″> Keywords: <LI class=reg11>3–D Chip and Packaging Technologies <LI class=reg11>Applications and Commercialization <LI class=reg11>Design Methodology and Tools <LI class=reg11>Manufacturing in 3–D </LI>