Abbrevation
ATE
City
Santa Clara
Country
United States
Deadline Paper
Start Date
End Date
Abstract
<P align=justify>The workshop will examine where the ATE industry is heading in the near–term as well as in the long–term. Integrated circuits get denser, larger, and faster and more heterogeneous. As the number of dies in a single package increases, so does the test quality target. Certain dies require Known–Good–Die (KGD) quality levels, whereas more complex failure modes already challenge our yield learning curves. </P><BR><B>Keywords:</B> <LI>Design for Testability (BIST, BISR) <LI>Test methods for future defects <LI>Adaptive Design Techniques <LI>ATE/EDA Link <LI>High–speed IO ATE <LI>Low–cost ATE <LI>RF ATE <LI>ATE for Statistical Test </LI>