IEEE International Workshop onMemory Technology, Design, and Testing, Taipei, Taiwan

Abbrevation

MTDT

Link

http://www.ieee-mtdt.org/

City

Taipei

Country

Taiwan

Deadline Paper

2007-09-15

Start Date

2007-12-03

End Date

2007-12-05

Abstract

Following the traditions set up by its predecessors, MTDT07 will provide a forum dedicated to the recent advancements of the memory technology, covering topics such as memory device, circuit design, architecture, fabrication process, verification, yield analysis testing/diagnosis/repair for all kinds of memory such as SRAM, DRAM, Flash memory, EPROM, EEPROM, embedded memories, 3–D memories, content addressable memories, etc. Keywords: Next–generation memory device Memory testing Next–generation memory process Memory built–in self–test DRAM cell design Memory diagnosis & repair Flash cell design Cell Characterization Cache memory design Failure analysis Multi–port SRAM design Fault modeling High–speed memory design Yield analysis Low–power memory design Reliability analysis Fault–tolerant architecture Memory for space application Memory compiler Verification methodology