Abbrevation
IWLS
Link
City
Lake Tahoe
Country
United States
Deadline Paper
Start Date
End Date
Abstract
<P class=style54>The International Workshop on Logic and Synthesis provides a forum for research in synthesis, optimization, and verification of integrated circuits and systems. The emphasis is on novelty and intellectual rigor. The workshop encourages early dissemination of ideas and results. The workshop format includes paper presentations, posters, invited talks, social lunch and dinner gatherings, and recreational activities. <B>Keywords:</B> </P> <DIV> <LI>synthesis and optimization; <LI>power and timing analysis; <LI>testing and verification; <LI>architectures and compilation; <LI>design experiences.</LI></DIV>