Abbrevation
IWLS
City
Lake Tahoe
Country
United States
Deadline Paper
Start Date
End Date
Abstract

<P class=style54>The International Workshop on Logic and Synthesis provides a forum for research in synthesis, optimization, and verification of integrated circuits and systems&#046; The emphasis is on novelty and intellectual rigor&#046; The workshop encourages early dissemination of ideas and results&#046; The workshop format includes paper presentations, posters, invited talks, social lunch and dinner gatherings, and recreational activities&#046; <B>Keywords:</B> </P> <DIV> <LI>synthesis and optimization; <LI>power and timing analysis; <LI>testing and verification; <LI>architectures and compilation; <LI>design experiences&#046;</LI></DIV>