Abbrevation
IWLPC 2008
City
San Jose, CA
Country
United States
Start Date
Abstract

<p><font face=&#8243;arial, helvetica, sans&#8211;serif&#8243; size=&#8243;2&#8243;> Sponsored jointly by the SMTA and <strong><a href=&#8243;http://www&#046;chipscalereview&#046;com/&#8243; target=&#8243;new&#8243;><i>Chip Scale Review</i> magazine</a></strong>, the annual IWLPC explores cutting edge topics in wafer&#8211;level packaging and IC/MEMS/MOEMS packaging, including 3D/Stacked/CSP/SiP/SoP and mixed technology packages&#046;<br></font><span style=&#8243;font&#8211;family: Arial;&#8243;></span></p>