Abbrevation
IWLPC 2008
City
San Jose, CA
Country
United States
Start Date
Abstract
<p><font face=″arial, helvetica, sans–serif″ size=″2″> Sponsored jointly by the SMTA and <strong><a href=″http://www.chipscalereview.com/″ target=″new″><i>Chip Scale Review</i> magazine</a></strong>, the annual IWLPC explores cutting edge topics in wafer–level packaging and IC/MEMS/MOEMS packaging, including 3D/Stacked/CSP/SiP/SoP and mixed technology packages.<br></font><span style=″font–family: Arial;″></span></p>