Workshop on Cryptographic Hardware and Embedded Systems, Lausanne, Schweiz

Abbrevation

CHES-

Link

http://www.chesworkshop.org/

City

Lausanne

Country

Switzerland

Deadline Paper

2009-03-16

Start Date

2009-09-06

End Date

2009-09-09

Abstract

The focus of this workshop is on all aspects of cryptographic hardware and security in embedded systems. The workshop is a forum for new results from the research community as well as from the industry. Of special interest are contributions that describe new methods for secure and efficient hardware implementations, and high–speed or leak–resistant software for embedded systems, e.g. smart cards, microprocessors, DSPs, etc. The workshop helps to bridge the gap between the cryptography research community and the application areas of cryptography. Consequently, we encourage submissions from academia, industry, and other organizations. All submitted papers will be reviewed. The topics of CHES 2009 include but are not limited to Cryptographic Hardware <ul><li>Hardware architectures for public–key & secret–key cryptography</li><li>Special–purpose hardware for cryptanalysis</li><li>Cryptographic processors and co–processors </li><li>Hardware accelerators for security protocols (security processors, network processors, etc.)</li><li>True and pseudorandom number generators</li><li>Physically Unclonable Functions (PUFs)</li></ul> Cryptographic Software for Embedded Systems <ul><li>Efficient software implementations of cryptography for embedded processors </li><li>Efficient and secure implementations of cryptography using multiprocessor cores</li><li>Cryptographic libraries</li><li>Cryptographic algorithms targeting embedded devices</li></ul> Attacks Against Implementations and Countermeasures Against These Attacks <ul><li>Side channel attacks and countermeasures</li><li>Faults and fault models for cryptographic devices</li><li>Fault attacks and countermeasures</li><li>Hardware tamper resistance</li><li>Trojan hardware</li></ul> Tools and Methodologies <ul><li>Computer aided cryptographic engineering</li><li>Methodologies and environments for fair comparison of hardware and software efficiency of cryptographic algorithms, architectures, and implementations</li><li>Partial and run–time reconfiguration of cryptographic systems</li><li>Reliability and fault tolerance in cryptography and cryptanalysis</li><li>Architectures for trusted computing</li></ul> Applications & Implementation Environments <ul><li>Cryptography in wireless applications (mobile phone, WLANs, etc.)</li><li>Cryptography for pervasive computing (RFID, sensor networks, etc.)</li><li>FPGA design security </li><li>Hardware IP protection and anti–counterfeiting techniques</li><li>Reconfigurable hardware for cryptography</li><li>Smart card processors, systems and applications</li><li>Security in commercial consumer applications (pay–TV, automotive, etc.)</li><li>Secure storage devices (memories, disks, etc.)</li><li>Technologies and hardware for content protection</li><li>Security for embedded software and systems</li></ul> <h3><a name=″instructions″>Instructions for Authors</a></h3> <!––The submission deadline for CHES 2007 has passed.––> <!––Authors are invited to submit original papers in PDF format at the <a href=″https://s1.iacr.org/websubrev/ches2008/submit/″>electronic submission site</a>. Instructions and details of the submission process are posted on that site.––> Authors are invited to submit original papers via electronic submission. Details of the electronic submission procedure will be posted here when the system is activated, a month before the submission deadline. The submission must be anonymous, with no author names, affiliations, acknowledgments, or obvious references. It should begin with a title, a short abstract, and a list of keywords. The paper should be at most 12 pages (excluding the bibliography and clearly marked appendices), and at most 15 pages in total, using at least 11–point font and reasonable margins. Submissions not meeting these guidelines risk rejection without consideration of their merits. All submissions will be blind–refereed. Policy against double submission Only original research contributions will be considered. Submissions that substantially duplicate work that any of the authors have published elsewhere, or have submitted in parallel to any other conferences or workshops that have proceedings, will be instantly rejected. Moreover, authors should be aware that the <a href=″http://www.iacr.org/irregular.html″ target=″_blank″>IACR Policy on Irregular Submissions</a> will be strictly enforced.