Abbrevation
D43D
City
Grenoble
Country
France
Deadline Paper
Start Date
End Date
Abstract

<P>3&#8211;D ICs enable dramatically improved performances at a much lower cost than new leading&#8211;edge CMOS technology below 32 nm transistor fabrication&#046; The success of these new ICs depends on the availability of new methodologies and skills that are required to achieve acceptable design quality and productivity&#046; This workshop brings together key actors from semiconductor companies, system design houses and EDA industry to build a vision of the next step in 3D integrated ICs design&#046; Topics addressed are: Applications requiring 3D, interconnect architectures and thermal management for 3D ICs, application partitioning, floor planning for 3D architectures, modeling, characterization and testing for 3D ICs&#046;</P> <P><B>Keywords:</B> The program brings together key actors from 3D&#8211;IC Design and Technology to build a vision of the next step in integrated system design&#046; More than 30 world class R&amp;D speakers will discuss <STRONG>fundamental and strategic issues to master 3D&#8211;IC design&#046;<BR></STRONG></P>