Abbrevation
LPonTR’10
Link
http://www.staff.ncl.ac.uk/a.bystrov/LPonTR/
City
Prague
Country
Czechia
Deadline Paper
Start Date
End Date
Abstract

The International Workshop on Impact of Low Power Design on Test and Reliability (LPonTR)<br>aims to bring together design, reliability and test engineers and researchers to discuss the impact of<br>advanced low&#8211;power low&#8211;voltage design methodologies of nanometer silicon systems on test and reliability&#046;<br>Power and thermal issues, leakage, process variations, susceptibility to environmental and<br>operation&#8211;induced interference are physical constraints that drive the development of low&#8211;power,<br>process&#8211;tolerant design techniques&#046; However, these techniques generate a new set of test and reliability<br>challenges, questing for an innovative set of methodologies and tools&#046;