<P class=style15>The goal of MEMOCODE 2011, the ninth in a series of successful international conferences, is to gather researchers and practitioners in the field of the design of modern hardware and software system to explore ways in which future design methods can benefit from new results on formal methods. </P> <P class=style14><SPAN lang=EN–US><FONT face=Calibri><SPAN class=style8>The ninth MEMOCODE conference will attract researchers and practitioners who create methods, tools, and architectures for the design of hardware/software systems.</SPAN><SPAN class=style8 style="mso–spacerun: yes"> </SPAN><SPAN class=style8>These systems face increasing design complexity including tighter constraints on timing, power, costs, and reliability. MEMOCODE seeks submissions that present novel formal methods and design techniques addressing these issues to create, refine, and verify hardware/software systems. We also invite application–oriented papers, and especially encourage submissions that highlight the design perspective of formal methods and models, including success stories and demonstrations of hardware/software codesign. Furthermore, we invite poster presentations describing ongoing work with promising preliminary results.</SPAN><?XML:NAMESPACE PREFIX = O /><O:P></O:P></FONT></SPAN></P> <P class=style14><SPAN lang=EN–US><FONT face=Calibri><SPAN class=style8 style="mso–spacerun: yes"> </SPAN><SPAN class=style8>Topics of interest for regular submissions include but are not limited to</SPAN><O:P></O:P></FONT></SPAN></P> <P class=style2 style="mso–list: l0 level1 lfo1"><SPAN lang=EN–US style="FONT–FAMILY: Symbol; mso–fareast–font–family: Symbol; mso–bidi–font–family: Symbol"><SPAN style="mso–list: Ignore">·<SPAN class=style7 style="FONT–WEIGHT: normal; LINE–HEIGHT: normal; FONT–STYLE: normal; FONT–VARIANT: normal"> </SPAN></SPAN></SPAN><SPAN class=style7 lang=EN–US>system– and transaction–level modeling and verification, abstraction and refinement between different modeling levels, formal, semi–formal, and specification–driven verification,<SPAN style="mso–spacerun: yes"> </SPAN><O:P></O:P></SPAN></P> <P class=style2 style="mso–list: l0 level1 lfo1"><SPAN lang=EN–US style="FONT–FAMILY: Symbol; mso–fareast–font–family: Symbol; mso–bidi–font–family: Symbol"><SPAN style="mso–list: Ignore">·<SPAN class=style7 style="FONT–WEIGHT: normal; LINE–HEIGHT: normal; FONT–STYLE: normal; FONT–VARIANT: normal"> </SPAN></SPAN></SPAN><SPAN class=style7 lang=EN–US>design and verification methods for composition of concurrent systems: multi–core platform architectures, systems–on–chip, networks–on–chip,<SPAN style="mso–spacerun: yes"> </SPAN><O:P></O:P></SPAN></P> <P class=style2 style="mso–list: l0 level1 lfo1"><SPAN lang=EN–US style="FONT–FAMILY: Symbol; mso–fareast–font–family: Symbol; mso–bidi–font–family: Symbol"><SPAN style="mso–list: Ignore">·<SPAN class=style7 style="FONT–WEIGHT: normal; LINE–HEIGHT: normal; FONT–STYLE: normal; FONT–VARIANT: normal"> </SPAN></SPAN></SPAN><SPAN class=style7 lang=EN–US>formal methods and tools for hardware and software verification including theorem proving, decision procedures,<SPAN style="mso–spacerun: yes"> </SPAN><O:P></O:P></SPAN></P> <P class=style2 style="mso–list: l0 level1 lfo1"><SPAN lang=EN–US style="FONT–FAMILY: Symbol; mso–fareast–font–family: Symbol; mso–bidi–font–family: Symbol"><SPAN style="mso–list: Ignore">·<SPAN class=style7 style="FONT–WEIGHT: normal; LINE–HEIGHT: normal; FONT–STYLE: normal; FONT–VARIANT: normal"> </SPAN></SPAN></SPAN><SPAN class=style7 lang=EN–US>non–traditional and domain–specific design languages for hardware and software, novel models of computation, and new design paradigms that unify hardware and software design,<SPAN style="mso–spacerun: yes"> </SPAN><O:P></O:P></SPAN></P> <P class=style2 style="mso–list: l0 level1 lfo1"><SPAN lang=EN–US style="FONT–FAMILY: Symbol; mso–fareast–font–family: Symbol; mso–bidi–font–family: Symbol"><SPAN style="mso–list: Ignore">·<SPAN class=style7 style="FONT–WEIGHT: normal; LINE–HEIGHT: normal; FONT–STYLE: normal; FONT–VARIANT: normal"> </SPAN></SPAN></SPAN><SPAN class=style7 lang=EN–US>system–level estimation of performance and power in heterogeneous hardware/software architectures,<SPAN style="mso–spacerun: yes"> </SPAN><O:P></O:P></SPAN></P> <P class=style2 style="mso–list: l0 level1 lfo1"><SPAN lang=EN–US style="FONT–FAMILY: Symbol; mso–fareast–font–family: Symbol; mso–bidi–font–family: Symbol"><SPAN style="mso–list: Ignore">·<SPAN class=style7 style="FONT–WEIGHT: normal; LINE–HEIGHT: normal; FONT–STYLE: normal; FONT–VARIANT: normal"> </SPAN></SPAN></SPAN><SPAN class=style7 lang=EN–US>applications and demonstrators of formal design methodologies and case studies of innovative system–level design flows,<O:P></O:P></SPAN></P> <P class=style2 style="mso–list: l0 level1 lfo1"><SPAN lang=EN–US style="FONT–FAMILY: Symbol; mso–fareast–font–family: Symbol; mso–bidi–font–family: Symbol"><SPAN style="mso–list: Ignore">·<SPAN class=style7 style="FONT–WEIGHT: normal; LINE–HEIGHT: normal; FONT–STYLE: normal; FONT–VARIANT: normal"> </SPAN></SPAN></SPAN><SPAN lang=EN–US><SPAN class=style7>modeling and reuse of intellectual property at system–level, and<SPAN style="mso–spacerun: yes"> </SPAN></SPAN><O:P></O:P></SPAN></P> <P class=style3 style="mso–list: l0 level1 lfo1"><SPAN lang=EN–US style="FONT–FAMILY: Symbol; mso–fareast–font–family: Symbol; mso–bidi–font–family: Symbol"><SPAN style="mso–list: Ignore">·<SPAN class=style7 style="FONT–WEIGHT: normal; LINE–HEIGHT: normal; FONT–STYLE: normal; FONT–VARIANT: normal"> </SPAN></SPAN></SPAN><SPAN class=style7 lang=EN–US>design abstraction and high–level design demonstrating productivity and quality in generating and validating RTL and software. <O:P></O:P></SPAN></P>
Abbrevation
MEMOCODE
City
Cambridge
Country
UK
Deadline Paper
Start Date
End Date
Abstract