7th IEEE/ACM International Symposium on Nanoscale Architectures, San Diego, Vereinigte Staaten

Abbrevation

NANOARCH

Link

http://www.nanoarch.org

City

San Diego

Country

United States

Deadline Paper

2011-04-17

Start Date

2011-06-08

End Date

2011-06-09

Abstract

<UL> NANOARCH is the annual cross–disciplinary forum for the discussion of novel post–CMOS nanocomputing directions. The symposium seeks papers on innovative ideas for solutions to the principal challenge facing integrated electronics in the 21st century â€“ how to design, fabricate, and integrate nanosystems to overcome the fundamental limitations of CMOS. In particular, such systems could (1) contain unconventional nanodevices with unique capabilities, including directions beyond simple switches, (2) introduce new logic and memory concepts, (3) involve novel circuit styles, (4) introduce new concepts for computing, (5) reconfigure and/or mask faults at much higher rates than in CMOS, (6) involve new paradigms for manufacturing, and (7) rethink the methodologies and design tools involved. Example topics (both theoretical and experimental) of interest include (but are not limited to): <?xml:namespace prefix = o ns = "urn:schemas–microsoft–com:office:office" /> * Novel nanodevices and manufacturing/integration ideas with a focus on nanoarchitectures * Nanoelectronic circuits, nanofabrics, computing paradigms and nanoarchitectures * 2D/3D/hybrid nanodevice integration and manufacturing, with defect and fault tolerance * Nanodevice and nanocircuit models, methodologies and computer aided design tools * Fundamental limits of computing at the nanoscale </UL>