<P>The International Conference on Field Programmable Logic and Applications (FPL) is the first and largest conference covering the rapidly growing area of field–programmable logic. During the past 18 years, many of the advances achieved in reconfigurable architectures, applications, design methods and tools have been first published in the proceedings of the FPL conference series.</P> <P>Its objective is to bring together researchers and industry from all over the world for a wide ranging discussion of FPGAs, including, but not limited to: applications, advanced electronic design automation (EDA), novel system architectures, embedded processors, arithmetic, dynamic reconfiguration, etc.</P> <P><A href="http://fpl2009.org/index.php?p=phd_forum">The PhD forum</A> enables students to present their work and get feedback from experienced researchers and industrial partners.</P> <P>FPL is organised yearly in Europe and attended by top–level scientists and researchers. The 19th FPL continues the tradition of the previous editions and will be hosted by the Institute of Information Theory and Application of the Academy of Sciences of the Czech Republic from August 31 to September 2, 2009. </P> <H1>CONFERENCE TOPICS</H1> <P>The Program Committee cordially invites you to participate and <A href="http://fpl2009.org/index.php?p=submission">submit your contribution</A> to FPL 2009. The conference topics include, but are not limited to, the following: </P> <H3>RECONFIGURABLE ARCHITECTURES</H3> <P>Dynamic, partial, run–time reconfiguration<BR>Low power architectures<BR>Defect and fault tolerance<BR>Reconfigurable embedded systems<BR>Field–programmable analog arrays<BR>Interconnects and NoCs </P> <H3>APPLICATIONS</H3> <P>Communications and networking<BR>Cryptography<BR>Bioinformatics<BR>Application acceleration<BR>Evolvable and bio–inspired applications<BR>Medical solutions<BR>Experiments for High Energy Physics<BR>Astronomy<BR>Aerospace </P> <H3>DESIGN METHODS AND TOOLS</H3> <P>CAD for reconfigurable architectures<BR>Dynamic, partial, run–time reconfiguration<BR>Logic optimization and technology mapping<BR>Placement and routing algorithms<BR>System–level design methods<BR>Testing, verification and benchmarking<BR>Hardware/software co–design<BR>Compilers and languages<BR>Rapid prototyping<BR>Radiation tolerance and reliability<BR></P> <H3>SURVEYS, TRENDS AND EDUCATION</H3> <P>Roadmap for reconfigurable computing<BR>Teaching reconfigurable systems<BR>History and surveys of reconfigurable logic<BR>Emerging device technologies<BR>Tutorials </P>
Abbrevation
FPL
Link
City
Prag
Country
Czechia
Deadline Paper
Start Date
End Date
Abstract