<P align=justify>The IEEE Latin–American Test Workshop (LATW) provides an annual forum for test and fault tolerance professionals and technologists from all over the world and in particular from Latin America, to present and discuss various aspects of system, board, and component testing and fault–tolerance with design, manufacturing and field considerations in mind. Presented papers will be also published in the IEEE Xplore Digital Library. The best papers of the 13th IEEE LATW will be invited to re–submit to the IEEE Design and Test of Computers, Journal of Electronic Testing: Theory and Applications (JETTA), and Journal of Low Power Electronics (JOLPE).</P> <P align=justify>LATW2012 will be held in the capital of Ecuador, Quito, a colonial and contemporary city that has been declared Cultural Heritage of the Humanity. Quito offers an amazing landscape surrounded by snowy mountains and volcanoes. There you will find colors, friendship, pleasure and a great diversity of customs and traditions. Close to Quito (100Kms away) there is Otavalo, a touristic city known as an important ancient culture site engraved in the mountains, with fancy dressing, common language (Quechua) and archaeological places. In Ecuador you can find subtropical rain forest and the astonishing Galapagos Islands. This is an extraordinary natural laboratory that is a fusion of particular species of fauna and flora of unique natural value in the world.</P> <P>The IEEE Latin–American Test Workshop (LATW) provides an annual forum for test and fault tolerance professionals and technologists from all over the world and in particular from Latin America to present and discuss various aspects of system, board, and component testing and fault–tolerance with design, manufacturing and field considerations in mind. Presented papers are also published in the IEEE Xplore Digital Library. The best papers of the 13th IEEE LATW will be invited to re–submit to the IEEE Design and Test of Computers, Journal of Electronic Testing: Theory and Applications (JETTA), and Journal of Low Power Electronics (JOLPE).</P> <H3>Topics of interest include but are not limited to:</H3> <UL> <LI>Analog Mixed Signal Test</LI> <LI>Automatic Test Generation</LI> <LI>Built–In Self–Test</LI> <LI>Defect–Based Test</LI> <LI>Design and Synthesis for Testability</LI> <LI>Design for Electromagnetic Compatibility</LI> <LI>Design for Reliable Embedded Software</LI> <LI>Design Verification/Validation</LI> <LI>Economics of Test</LI> <LI>Fault Analysis and Diagnosis</LI> <LI>Fault Modeling and Simulation</LI> <LI>Fault–Tolerance in HW/SW</LI> <LI>Fault–Tolerant Architectures</LI> <LI>Memory Test and Repair</LI> <LI>On–Line Testing</LI> <LI>Process Control and Measurements</LI> <LI>Radiation/EMI</LI> <LI>Hardening Techniques</LI> <LI>Software Fault–Tolerance</LI> <LI>Software On–Line Testing</LI> <LI>System–on–Chip Test</LI> <LI>Test Resource Partitioning</LI> <LI>Yield Optimization</LI></UL>
Abbrevation
LATW
City
Quito
Country
Ecuador
Deadline Paper
Start Date
End Date
Abstract