<p class="MsoNormal" style="margin–top: 0pt; margin–bottom: 0pt;"> <font face="Verdana"> <span style="font–size: 9pt; font–style: normal; font–weight: 700" lang="EN–GB"> MICROELECTRONICS TECHNOLOGY:</span><span style="font–size: 9pt; font–style: normal;" lang="EN–GB"><br></span></font></p> <p class="MsoNormal" style="margin–top: 0; margin–bottom: 0"><font face="Verdana"><span style="font–size: 9pt; font–style: normal" lang="EN–GB">Device characterization and modeling. </span> </font></p> <span style="font–size: 9pt; font–style: normal" lang="EN–GB">Device physics and novel structures. </span> <p class="MsoNormal" style="margin–top: 0pt; margin–bottom: 0pt;"><font face="Verdana"><span style="font–size: 9pt; font–style: normal;" lang="EN–GB">Materials and material characterization techniques.</span></font></p> <p class="MsoNormal" style="margin–top: 0; margin–bottom: 0"><font face="Verdana"><span style="font–size: 9pt; font–style: normal" lang="EN–GB">Process technology, CMOS, BJT, BiCMOS, GaAs. </span></font></p> <font face="Verdana"><span style="font–size: 9pt; font–style: normal" lang="EN–GB">Reliability and failure analysis. </span></font><br><p class="MsoNormal" style="margin–top: 0pt; margin–bottom: 0pt;"><font face="Verdana"><span style="font–size: 9pt; font–style: normal;" lang="EN–GB">Radiation effects.</span></font></p> <p class="MsoNormal" style="margin–top: 0; margin–bottom: 0"><font face="Verdana"><span style="font–size: 9pt; font–style: normal" lang="EN–GB">Packaging, surface mount technology. </span> </font></p> <p class="MsoNormal" style="margin–top: 0pt; margin–bottom: 0pt;"><font face="Verdana"><span style="font–size: 9pt; font–style: normal;" lang="EN–GB">Opto–electronics.</span></font></p> <p class="MsoNormal" style="margin–top: 0; margin–bottom: 0"><font face="Verdana"><span style="font–size: 9pt; font–style: normal" lang="EN–GB">MEMs and MOEMs Devices. </span></font></p> <p class="MsoNormal" style="margin–top: 0; margin–bottom: 0"><font face="Verdana"><span style="font–size: 9pt; font–style: normal" lang="EN–GB">Smart power and sensors.</span></font></p> <p class="MsoNormal" style="margin–top: 0pt; margin–bottom: 0pt;"> <font face="Verdana"> <span style="font–size: 9pt; font–style: normal; font–weight: 700"> DESIGN AND APPLICATION OF INTEGRATED CIRCUITS AND SYSTEMS:</span><span style="font–size: 9pt; font–style: normal;" lang="EN–GB"><br></span></font></p> <p class="MsoNormal" style="margin–top: 0; margin–bottom: 0"><font face="Verdana"><span style="font–size: 9pt; font–style: normal" lang="EN–GB">Custom and semi–custom circuits (design concepts, architectures and high–performance and low–power circuits). </span></font></p> <p class="MsoNormal" style="margin–top: 0pt; margin–bottom: 0pt;"><font face="Verdana"><span style="font–size: 9pt; font–style: normal;" lang="EN–GB">Embedded system design.</span></font></p> <p class="MsoNormal" style="margin–top: 0; margin–bottom: 0"><font face="Verdana"><span style="font–size: 9pt; font–style: normal" lang="EN–GB">Systems on Chip (SoCs). </span></font></p> <span style="font–size: 9pt; font–style: normal" lang="EN–GB">Digital signal and data processing.</span> <p class="MsoNormal" style="margin–top: 0pt; margin–bottom: 0pt;"><font face="Verdana"><span style="font–size: 9pt; font–style: normal;" lang="EN–GB">Analog circuit techniques.</span></font></p> <p class="MsoNormal" style="margin–top: 0; margin–bottom: 0"><font face="Verdana"><span style="font–size: 9pt; font–style: normal" lang="EN–GB">Design for testability. </span></font></p> <span style="font–size: 9pt; font–style: normal" lang="EN–GB">Low–voltage, low–power VLSI design.</span> <p class="MsoNormal" style="margin–top: 0pt; margin–bottom: 0pt;"><font face="Verdana"><span style="font–size: 9pt; font–style: normal;" lang="EN–GB">Applications to computer and telecommunications systems.</span></font></p> <p class="MsoNormal" style="margin–top: 0; margin–bottom: 0"><font face="Verdana"><span style="font–size: 9pt; font–style: normal" lang="EN–GB">ANN applications. </span></font></p> <span style="font–size: 9pt; font–style: normal" lang="EN–GB">Wireless Communication Applications. </span> <p class="MsoNormal" style="margin–top: 0pt; margin–bottom: 0pt;"> <font face="Verdana"> <span style="font–size: 9pt; font–style: normal; font–weight: 700"> COMPUTER–AIDED DESIGN FOR MICROELECTRONICS:</span><span style="font–size: 9pt; font–style: normal;" lang="EN–GB"><br></span></font></p> <p class="MsoNormal" style="margin–top: 0; margin–bottom: 0"><font face="Verdana"><span style="font–size: 9pt; font–style: normal" lang="EN–GB">Simulation (process, device, circuit, logic, timing, functional). </span></font></p> <p class="MsoNormal" style="margin–top: 0pt; margin–bottom: 0pt;"><font face="Verdana"><span style="font–size: 9pt; font–style: normal;" lang="EN–GB">Layout (placement, routing, floorplanning, symbolic, ERC, DRC).</span></font></p> <p class="MsoNormal" style="margin–top: 0; margin–bottom: 0"><font face="Verdana"><span style="font–size: 9pt; font–style: normal" lang="EN–GB">Test (generation, testability, build–in test, simulation). </span></font></p> <p class="MsoNormal" style="margin–top: 0pt; margin–bottom: 0pt;"><font face="Verdana"><span style="font–size: 9pt; font–style: normal;" lang="EN–GB">Systems (design synthesis, compilation, expert systems, tool integration, hardware acceleration, CAD systems).</span></font></p> <p class="MsoNormal" style="margin–top: 0pt; margin–bottom: 0pt;"><font face="Verdana"><span style="font–size: 9pt; font–style: normal;" lang="EN–GB">Formal verification.</span></font></p> <p class="MsoNormal" style="margin–top: 0pt; margin–bottom: 0pt;"><font face="Verdana"><span style="font–size: 9pt; font–style: normal;" lang="EN–GB"><br></span></font></p>
Abbrevation
ICM
City
Hammamet
Country
Tunisia
Deadline Paper
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End Date
Abstract