The International Symposium on Networks–on–Chip (NOCS) is the premier event dedicated to interdisciplinary research on on–chip communication technology, architecture, design methods and applications. NOCS aims at bringing together scientists and engineers working on NoC innovations from inter–related research communities, including computer architecture, networking, circuits and systems, embedded systems, and design automation. Topics of interest include, but are not limited to:<br>Network architecture (topology, routing, arbitration)<br>Network design for 3D stacked logic and memory<br>Mapping of applications onto NoCs<br>Power and energy issues<br>Timing, synchronous/asynchronous communication<br>NoC reliability issues<br>OS support for NoCs<br>Programming models<br>Multi/many–core workload characterization & evaluation<br>Network interface issues<br>NoC case studies, application–specific NoC design<br>Modeling, simulation, and synthesis of NoCs<br>NoC support for memory and cache access<br>NoC design methodologies and tools<br>NoC Quality of Service<br>NoCs for FPGAs and structured ASICs<br>NoC support for CMP/MPSoCs<br>Novel interconnect links/switches/routers<br>Optical & RF for on–chip/in–package interconnects<br>Signaling and circuit design for NoC links<br>Physical design of interconnect and NoC<br>Verification, debug & test of NoCs<br>Metrics and benchmarks for NoCs<br>
Abbrevation
NOCS
City
Lyngby
Country
Denmark
Deadline Paper
Start Date
End Date
Abstract