A wide range of applications, from secure RFID tagging to high–end trusted computing,<br>relies on dedicated and trusted hardware platforms. The security and trustworthiness of<br>such hardware designs are critical to their successful deployment and operation. Recent<br>advances in tampering and reverse engineering show that important challenges lie<br>ahead. For example, secure electronic designs may be affected by malicious circuits,<br>Trojans that alter system operation. Furthermore, dedicated secure hardware<br>implementations are susceptible to novel forms of attack that exploit side–channel<br>leakage and faults. Third, the globalized, horizontal semiconductor business model<br>raises concerns of trust and intellectual–property protection. HOST 2012 is a forum for<br>novel solutions to address these challenges. Innovative test mechanisms may reveal<br>Trojans in a design before they are able to do harm. Implementation attacks may be<br>thwarted using side–channel resistant design or fault–tolerant designs. New securityaware<br>design tools can assist a designer in implementing critical and trusted<br>functionality, quickly and efficiently.<br>The IEEE International Symposium on Hardware Oriented Security and Trust seeks<br>original contributions in the area of hardware–oriented security. This includes tools,<br>design methods, architectures, and circuits. In addition, novel applications of secure<br>hardware are especially welcome. HOST 2012 seeks contributions based on, but not<br>limited to, the following topics.<br>Trojan detection and isolation<br>Implementation attacks and countermeasures<br>Side channel analysis and fault analysis<br>Intellectual property protection and metering<br>Tools and methodologies for secure hardware design<br>Hardware architectures for cryptography<br>Hardware security primitives: PUFs and TRNGs<br>Applications of secure hardware<br>Interaction of secure hardware and software<br>
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San Francisco
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United States
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