OBJECTIVES:<br>The growing importance of automated formal verification in the industry is driving a growing interest in aspects that directly impact its applicability to real world problems. One of the main technical challenges lies in devising tools and techniques that allow to handle very large industrial verification models.<br>At the same time, the computer industry is undergoing a major paradigm shift. Processor manufacturers are introducing new generations of multicore processor with large numbers of cores and high performance GPUs, cloud based computing resources are easily accessible, and external memory devices, such as hard disks or solid state disks, are getting more powerful.<br>It is inevitable that verification techniques and tools need to undergo a similarly deep technological transition to catch up with the new hardware architectures. This has created an increasing interest in parallelizing and distributing verification techniques.<br>The aim of the PDMC workshop series is to cover all aspects related to the verification and analysis of very large and complex systems using, in particular, methods and techniques that exploit current parallel hardware architectures. The PDMC workshop aims to provide a working forum for presenting, sharing, and discussing recent achievements in the field of high–performance verification.<br>TOPICS OF INTEREST:<br>Topics of interest include, but are not limited to:<br>parallel and/or distributed–memory techniques for verification<br>parallel SAT solving and its applications in verification<br>I/O efficient algorithms for verification<br>GPU accelerated algorithms for verification<br>platform dependent verification tools<br>industrial case studies employing PDMC techniques<br>applications of PDMC techniques to systems biology<br>
Abbrevation
PDMC
City
London
Country
UK
Deadline Paper
Start Date
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Abstract