Abbrevation
CARL
City
PortlandOR
Country
United States
Deadline Paper
Start Date
End Date
Abstract

<p> The Workshop on the Intersections of Computer Architecture and Reconfigurable Logic (CARL) is a new forum for presenting FPGA and reconfigurable logic research relevant to a computer architecture audience&#046; In recent years, there has been a renewed interest in reconfigurable computing, driven by the need for greater computing performance and, at the same time, better power and energy efficiency&#046; Reconfigurable computing is a key technology candidate to efficiently leverage exponential device scaling beyond current multicore processors&#046; </p> <p> This full&#8211;day workshop will be held on Sunday, June 10, 2012, co&#8211;located with <a href="http://isca2012&#046;ittc&#046;ku&#046;edu/" class="urlextern" title="http://isca2012&#046;ittc&#046;ku&#046;edu/" rel="nofollow">ISCA&#8211;39</a> in Portland, Oregon&#046; The meeting will include keynote presentations, research presentations, “quick&#8211;pitches,” and a brainstorming panel&#046;<br></p> <p> <strong>Research Papers&#046;</strong> We invite research papers from all areas of FPGA and reconfigurable logic that impact the computer architecture community&#046; Major areas of interests include, but are not limited to: </p> <ul><li class="level1"><div class="li"> New FPGA architectures and reconfigurable fabric designed to support computing</div> </li><li class="level1"><div class="li"> Heterogeneous computing processors and systems that incorporate reconfigurable logic</div> </li><li class="level1"><div class="li"> Computation models and programming tools for reconfigurable and heterogeneous computing</div> </li><li class="level1"><div class="li"> State&#8211;of&#8211;the&#8211;art (ready&#8211;for&#8211;use) reconfigurable computing platforms and infrastructure</div> </li><li class="level1"><div class="li"> Algorithms and applications for reconfigurable computing (including FPGA&#8211;based prototyping and simulation of computer systems)</div> </li><li class="level1"><div class="li"> Evaluations of reconfigurable computing in terms of performance, power/energy, flexibility and cost, especially in comparison to other hardware paradigms (multicore, GPU, ASICs, etc&#046;)&#046; </div></li></ul> <p><br></p>