IEEE/ACM International Conference on Computer-Aided Design, San Jose, Vereinigte Staaten

Abbrevation

ICCAD

Link

http://WWW.ICCAD.COM

City

San Jose

Country

United States

Deadline Paper

2012-04-16

Start Date

2012-11-05

End Date

2012-11-08

Abstract

Original technical submissions on, but not limited to, the following topics are invited: 1) SYNTHESIS, VERIFICATION AND PHYSICAL DESIGN 1.1 Logic and High–Level Synthesis: Synthesis, technology mapping Refinement techniques Direct compilation and post–optimization Micro–architectural transformations Memory system synthesis 1.2 Simulation and Formal Verification: Formal verification techniques HW/SW co–simulation Switch, logic, behavioral, and system–level simulation and validation Protocol and interface design for correctness Software verification Emulation Hybrid systems Post–silicon validation (for functional design errors) 1.3 Partitioning, Placement and Floorplanning: High–level physical design and synthesis Estimation and hierarchy management Partitioning, floor–planning and global placement Detailed and incremental placement 1.4 Routing and Detailed Physical Design: Detailed routing, including routing for yield, manufacturability, and timing Post–placement layout optimization. 1.5 Optimization in Physical Design: Optimization for area, timing, power, and yield Interaction between physical design and logic synthesis 2) SYSTEM–LEVEL CAD 2.1 System Design: System–level specification and modeling and simulation System design flows and methods Models of computation HW/SW co–design, co–optimization, and co–exploration HW/SW platforms Rapid prototyping System design case studies and applications 2.2 Embedded Systems Hardware: Multi–core/multi–processors systems On–chip communication and networks–on–chip Static and dynamic reconfigurable architectures Regular circuits, structured ASICs Application–specific instruction–set processors (ASIPs) Memory hierarchies and management System–level issues for 3–D integration 2.3 Embedded Systems Software: Real–time software and RTOS Middleware Timing analysis and WCET Programming models for multi–core systems Profiling and compilation techniques 2.4 Power and Thermal Considerations in System Design: Power and thermal estimation, analysis, optimization, and management techniques for hardware and software systems 3) CAD FOR RELIABILITY, MANUFACTURABILITY, AND TEST 3.1 Design for Manufacturability: CAD for the design/manufacturing interface, CAD support for OPC and RET, variability analysis, yield estimation Manufacturable layout 3.2 Testing: Fault modeling, delay test, analog and mixed signal test Fault simulation ATPG, BIST and DFT Memory test and repair Technology impact on test Post–silicon validation and debug (for electrical, physical, and timing issues) 3.3 Design for Reliability: Design techniques for achieving reliability, resilience and robustness from unreliable components Analysis of thermal, reliability, aging, NBTI, electromigration, wearout, etc., effects in CMOS and mixed technologies and physical domains Reliability issues in system design and 3–D integration 4) CAD FOR CIRCUITS, DEVICES, AND INTERCONNECT 4.1 Analog, Mixed–Signal, RF and Multi–Domain Simulation: Numerical methods for analog, mixed–signal, RF, multi–domain (MEMS, nanoelectronic, optoelectronic, biological, etc.) network and system simulation Nonlinear model reduction and computational macromodeling Fast analysis of large–scale circuits and systems Computer–aided analysis, design, and simulation of electronic and mixed–domain devices including semiconductor, nanoelectronic, micromechanical, and electro–optical devices Compact device modeling and modeling of device variability 4.2 Analog, Mixed–Signal, RF and Multi–Domain Synthesis and Optimization: Advances in low power, variation–aware, high speed design methodology and tools Structural synthesis, sizing, design centering, symbolic and formal analysis, constraint management Analog place and route Synthesis and design methods for MEMS, electro–optical, and other mixed technology systems 4.3 Timing and Behavioral Modeling: Gate–, switch–, and block–level modeling Timing analysis and methodologies including statistical timing Current–source modeling Behavioral modeling of circuits and systems 4.4 Interconnect and Power Networks: Network–level power/ground and package analysis and optimization Reduced order modeling of interconnect and linear time invariant networks Signal integrity analysis Interconnect parameter extraction Electromagnetic simulation and package analysis EMC/EMI simulation techniques 5) CAD FOR NANOSCALE AND BIOLOGICAL SYSTEMS 5.1 Biological Systems: Computer–aided analysis techniques for biologicalsystems–biomolecular, intracellular, cellular, organ and organism level Analysis and design of synthetic biological systems. Multi–scale biological systems, systems biology 5.2 Nanoscale and Post–CMOS Systems: Analysis, synthesis and design methods for novel devices (eg., quantum, molecular, spin–based) and systems centered about future nanotechnologies Bio–electronic devices and systems