Custom Integrated Circuits Conference, San Jose, Vereinigte Staaten

Abbrevation

CICC

Link

http://www.ieee-cicc.org/

City

San Jose

Country

United States

Deadline Paper

2012-04-16

Start Date

2012-09-09

End Date

2012-09-12

Abstract

nalog Circuit Design: Data Converters â€“ Nyquist and oversampled, mixed signal analog/digital applications, analog sensor processing applications, low voltage and low power analog, deep submicron issues in analog design. Blocks for analog systems â€“ amplifiers, sample–holds, voltage references and regulators, filters continuous and discrete, non linear analog blocks, novel clock generation. Systems on Chip and 3D: Innovative digital or mixed signal SoCs, ASICs, or FPGAs. Advanced, complex or high performance circuits or design techniques. General purpose or application specific 3D / 2.5D multi–chip designs. Methodologies and infrastructures developed for large SoC or multi–dimensional designs realized on ICs. Design challenges and solutions in advanced process nodes. Papers should address the performance, bandwidth, energy efficiency or implementation issues encountered and resolved. Memory: Circuits, architectures and applications addressing power–performance–density trade–offs, Vmin, resiliency, endurance, data retention, variations tolerance and reliability for all memory technologies (SRAM, e/DRAM, CAM, ROM, OTP, MRAM, RRAM, PCM). Biomedical, Actuators, MEMS, and Sensors: Advanced ICs for biomedical, aerospace, automotive, energy, environment, and security applications. Interface circuits for emerging technologies in medicine, actuators, MEMS, and sensors are of particular interest. Examples include biosensors and devices and networks, nanotechnology, microchemical sensors, image sensors, OLEDâ€™s, DNA microarrays, micro– and nanofluidic chips, novel display technologies and organic circuitry. IC Manufacturing: Special focus on challenges of and alternatives to CMOS scaling, Design for Manufacturability, specialty manufacturing techniques, and design / technology interaction. Advanced manufacturing techniques using any combination of bulk/SOI CMOS, bipolar, non–silicon, and photonic technologies. Evolving chip packaging such as chip stacking, lead–free, flip–chip, and System–in–Package. Tutorial content and impact to the design community is encouraged. Power Management: Circuit and system architectures for power management and power consumption optimization. Advanced circuit topologies and innovations in switching / linear regulators, low power design, energy scavenging, wireless power transmission, battery charging and metering, digital control, dynamic power control, and other topical areas related to the challenges of efficient power generation, distribution, and utilization. Simulation and Modeling: Simulation/modeling techniques and methodologies for device–and circuit–level analysis, design and verification of analog, RF, memory, and mixed–signal circuits. S tatistical and reliability modeling and simulation. Compact models for active and passive devices. Behavioral modeling and simulation. Methodologies for PDK generation and validation. Parasitic extraction and reduction. Modeling and simulation of 3D ICs. Signal–integrity modeling and simulation. Package modeling. Test, Debug, and Reliability: Debug techniques. DFT (design for test) for digital, memory, analog/mixed signal circuits, equalizers, CDR, high speed I/O, MEMS, RF, and photonic ICs. Design techniques for high reliability applications. Reliability concerns in leading edge technologies, such as soft errors. Innovations in ESD protection. Issues of testability and constraints due to protection of intellectual property or system security. Wireline Communications: Circuits and systems for electrical and optical communications, including: serial links backplanes, high–speed memory and graphics interfaces, intra–chip and chip–to–chip interconnects, peripheral I/O buses, photonic transceivers, circuit blocks, including serializers, deserializers, equalizers, link–related clocking (PLLs, DLLs, and CDR), electro–optical conversion (TIA, lase/modulator drivers). Wireless Designs: Integrated wireless transceiver architectures and sub–circuits for cellular, connectivity, broadband and low–power communication, millimeter–waves and Terahertz, biomedical, smart antennas, MIMO, RF MEMS, software–defined and cognitive radio. Papers on RF circuit solutions targeting emerging wireless applications and techniques are particularly encouraged.