Abbrevation
UCHPC
City
Rhodes Island
Country
Greece
Deadline Paper
Start Date
End Date
Abstract

The goal of the workshop is to present latest research in how hardware and software (yet) unconventional for HPC is or can be used to reach goals such as best performance per watt&#046; UCHPC also covers according programming models, compiler techniques, and tools&#046; Thus, suggested topics for papers include, but are not limited to the following: <ul><li> Innovative use of hardware and software unconventional for HPC </li><li> HPC applications or visualizations in connection with HPC on GPUs (GPGPU), using GPUs embedded on processor dies (as found in AMD Fusion/APUs, NVidia Denver, Intel Ivy Bridge), Intel&#8242;s MIC and SCC, low power/embedded processors (including DSPs, Adapteva Epiphany), FPGAs (e&#046;g&#046; Convey), Tilera&#8242;s tile&#8211;based many&#8211;core processors, IBM Cell BE, accelerators, visualization cards, etc&#046; </li><li> Cluster/Grid solutions using unconventional hardware, e&#046;g&#046; clusters of game consoles, nodes using GPUs, Low Power/Embedded Processors, MPSoCs, new many&#8211;cores from Intel and/or ARM designs, Mac Minis/AppleTVs, FPGAs etc&#046; </li><li> Heterogeneous computing on hybrid platforms </li><li> Work on and use of new programming models and paradigms needed to support unconventional hardware, and hybrid/hierarchical combinations with more conventional systems&#046; Examples are OpenACC, OpenCL, Cilk+, and task&#8211;based approaches for heterogeneous systems </li><li> Performance and scalability studies in HPC using unconventional hardware </li><li> Reconfigurable Computing for HPC </li><li> Performance modeling, analysis and tools for HPC with unconventional hardware </li><li> New or adapted/extended (parallel) programming models for HPC with unconventional hardware </li></ul><p><br></p>