In this edition the submissions to SBCCI will be made to one of five tracks, whichever is the most appropriate at the authors judgment. Efforts are going towards a fair balance of the published papers in equal parts in the different areas.<br>Track 1: Analog & RF & Mixed Signal<br>Track Chair: Robson Nunes de Lima, UFBA– Brazil <div><p class="MsoNormal"><span class="apple–tab–span"> –</span> RF Design</p></div> <div><p class="MsoNormal"><span class="apple–tab–span"> </span>– Analog and mixed signal designs</p></div> <div><p class="MsoNormal"><span class="apple–tab–span"> </span>– Micro–electromechanical systems</p></div> <div><p class="MsoNormal"><span class="apple–tab–span"> </span>– Nanoelectronic circuits and nanoarchitectures</p></div> <div><p class="MsoNormal"><span class="apple–tab–span"> </span>– Harvesting / Scavenging Energy circuits</p></div> <div><p> </p></div> <p class="MsoNormal">Track 2: CAD, Verification & Test<br>Track Chair: Marcelo Johann, UFRGS – Brazil</p> <div><p class="MsoNormal"><span class="apple–tab–span"> </span>– Physical Design</p></div> <div><p class="MsoNormal"><span class="apple–tab–span"> </span>– System and circuit synthesis</p></div> <div><p class="MsoNormal"><span class="apple–tab–span"> </span>– Design space and architectural exploration</p></div> <div><p class="MsoNormal"><span class="apple–tab–span"> </span>– Design verification and simulation</p></div> <div><p class="MsoNormal"><span class="apple–tab–span"> </span>– Testability issues and design for test techniques</p></div> <div><p> </p></div> <p class="MsoNormal">Track 3: Digital, Reconfigurable & Applications<br>Track Chair: Volnei Pedroni, UTFPR – Brazil</p> <div><p class="MsoNormal"><span class="apple–tab–span"> –</span> Design, specification and modeling languages and applications</p></div> <div><p class="MsoNormal"><span class="apple–tab–span"> </span>– Reconfigurable architectures and novel applications of FPGAs</p></div> <div><p class="MsoNormal"><span class="apple–tab–span"> </span>– Hardware–software co–design and co–verification</p></div> <div><p class="MsoNormal"><span class="apple–tab–span"> </span>– Emulation and prototyping techniques</p></div> <div><p> </p></div> <p class="MsoNormal">Track 4: SoC, NoC, Embedded<br>Track Chair: Fernando Gehm Moraes, PUCRS – Brazil</p> <div><p class="MsoNormal"><span class="apple–tab–span"> </span>– Embedded systems design and industrial applications</p></div> <div><p class="MsoNormal"><span class="apple–tab–span"> </span>– NoC design</p></div> <div><p class="MsoNormal"><span class="apple–tab–span"> </span>– Systems–on–chip, IP reuse, MPSoC and platform–based designs</p></div> <p class="MsoNormal"><span class="apple–tab–span"> </span>– Low power and design techniques</p>
Abbrevation
SBCCI
City
Curitiba
Country
Brazil
Deadline Paper
Start Date
End Date
Abstract