The IEEE International Conference on 3D System Integration (3D IC) will be held in San Francisco, CA, October 2–4, 2013. <p>This year´s conference hotel will be The Westin San Francisco Market Street.</p> <p>This conference combines the previous ASET and IEEE EDS Society sponsored International 3D System Integration Conference, held in Tokyo in 2007 & 2008 and the IEEE CPMT sponsored 3D System Integration Conference held in 2005 & 2007 in Munich. The new, combined CPMT sponsored Conference will continue rotating between the three continents.</p> <p>3D IC will cover all 3D IC topics, including 3D process technology, materials, equipment, circuits technology, design methodology and applications. The conference invites authors and attendees to submit and interact with 3D researchers from all around the world. Papers are solicited in subject topics, including, but not limited to, the following:</p> <p><strong>3D IC Technology: </strong>Through Silicon Vias (TSV), wafer thinning, wafer alignment, wafer bonding, wafer dicing, 3D IC process, monolithic 3D integration, heterogeneous 3D integration, Capacitive coupling, Inductive coupling, multilevel epitaxial growth, etc.</p> <p><strong>3D IC Circuits Technology: </strong>3D SOC, 3D Memory, 3D Processor, 3D DSP, 3D FPGA, 3D RF and microwave/millimeter wave, 3D analog circuits, 3D Biomedical circuits etc.</p> <p><strong>3D Applications:</strong> imaging, memory, processors, communications, networking, wireless, biomedical etc.</p> <p><strong>3D Design Methodology: </strong>3D CAD, 3D synthesis, 3D design flows, Signal and power integrity analysis and design in 3D, 3D thermal design and analysis, test and design for test; 3D mechanical stress and reliability design and analysis, etc.</p><p><br></p>
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3DIC
City
San Francisco
Country
United States
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