Abbrevation
CS2
City
Vienna
Country
Austria
Deadline Paper
Start Date
End Date
Abstract

The wide diffusion of embedded systems, including multi&#8211;core, many&#8211;core, and reconfigurable platforms, poses a number of challenges related to the security of the operation of such systems, as well as of the information stored in them&#046; Malicious adversaries can leverage unprotected communication to hijack cyber&#8211;physical systems, resulting in incorrect and potentially highly dangerous behaviours, or can exploit side channel information leakage to recover secret information from a computing system&#046; Untrustworthy third party software and hardware can create openings for such attacks, which must be detected and removed or countered&#046; The prevalence of multi/many core systems opens additional issues such as NoC security&#046; Finally, the complexity on modern and future embedded and mobile systems leads to the need to depart from manual planning and deployment of security features&#046; Thus, design automation tools will be needed to design and verify the security features of new hardware/software systems&#046; The workshop is a venue for security and cryptography experts to interact with the computer architecture and compilers community, aiming at cross&#8211;fertilization and multi&#8211;disciplinary approaches to security in computing systems&#046;<br>Topics of interest include, but are not limited to:<br>Compiler and Runtime Support for Security<br>Cryptography in Embedded and Reconfigurable Systems<br>Design Automation and Verification of Security<br>Efficient Cryptography through Multi/Many core Systems<br>Fault Attacks and Countermeasures, including interaction with Fault Tolerance<br>Hardware Architecture and Extensions for Cryptography<br>Hardware/Software Security Techniques<br>Hardware Trojans and Reverse Engineering<br>Physical Unclonable Functions<br>Reliability and Privacy in Embedded Systems<br>Security of Cyber&#8211;Physical Systems<br>Security of Networks&#8211;on&#8211;Chips and Multi&#8211;core Architectures<br>Side Channel Attacks and Countermeasures<br>Trusted computing<br>