Workshop on High-performance and Real-time Embedded Systems, Vienna, Österreich

Abbrevation

HiRES

Link

http://www.cister.isep.ipp.pt/hires2014/

City

Vienna

Country

Austria

Deadline Paper

2013-10-14

Start Date

2014-01-20

End Date

2014-01-20

Abstract

Increasingly, time is a relevant concern which impacts in all application areas and challenges ahead. Real–time requirements can be found in applications ranging from large–scale data processing systems to deeply embedded devices. Examples include safety– critical systems with high–performance requirements, such as collision avoidance and autonomous driving in avionics and automotive respectively, in which the correct timing behaviour is of paramount importance; consumer systems, such as video processing in TV sets and games; or real–time complex event processing applications, such as online trading or real–time traffic management. In all these applications, systems are expected to cope with an increasing demand of functional and non–functional requirements, with the corresponding increase in processing capabilities, paving the way for high–performance architectures, of which multi–core and many–core systems are becoming pervasive. The capabilities and challenges of parallelization as a means to provide higher performance is a cross–cutting concern. This workshop intends to bring together researchers and engineers in the confluence of high–performance, embedded systems and real–time systems. The goal is to allow for fruitful discussions on the challenges and research directions that should be tackled by the community. Papers are invited to illustrate current and future work in the theory and practice of the design and engineering of high–performance real–time embedded systems for a variety of application domains. Topics of interest –––––––––––––––––– Topics of interest to this edition of the workshop include but are not limited to: – Runtimes and operating systems combining high–performance and predictability requirements; – Programming models and compiler support for providing real–time capabilities to multi– and many–core architectures; – Models and tools for code generation, system verification and validation; – Worst–case execution time analysis, parallel/dag–based task models, schedulability analysis of multi– and many–core systems; – Heterogeneous multi–core embedded real–time architectures, many–core accelerators; – Time–predictable multi– and many–core processor architectures; – Time–aware energy–efficiency.