Abbrevation
HiPEAC
City
Wien
Country
Austria
Deadline Paper
Start Date
End Date
Abstract

<br>The main purpose of this workshop is to encourage the submission of work&#8211;in&#8211;progress in the topics covered by the call, thus providing quick and valuable feedback&#046; As such we do not provide formal proceedings&#046; We encourage authors of papers who want to immediately timestamp their idea to forward their paper to HiPEAC tech&#8211;report, after presentation at our workshop&#046;<br>Authors are invited to electronically submit papers with a maximum length of 10 pages in Springer LNCS format&#046;<br>The Hot Topic for the 8th edition of WRC is<br>SPACE AND AVIONICS RECONFIGURABLE APPLICATIONS:<br>&#8211;Radiation tolerant FPGA architecture<br>&#8211;Single Event Effects aware Configurable Logic Blocks<br>&#8211;Single Event Upsets mitigation solutions for FPGA<br>&#8211;Dynamic reconfigurable computing for space<br>&#8211;Remote FPGA configuration for space applications<br>&#8211;Fault tolerant reconfigurable systems<br>&#8211;Self&#8211;based reconfiguration FPGA for space<br>&#8211;Design tools for SRAM and non&#8211;volatile FPGA for space and avionics<br>The others topics of interest include, but are not limited to:<br>Reconfigurable Architectures:<br>&#8211; Novel architectures (logic blocks, interconnects, I/O)<br>&#8211; Reconfigurable fabrics combined with dedicated system blocks (DSP, processors, memory etc&#046;)<br>&#8211; Memory issues: adaptivity, coherence, latency tolerance, …<br>&#8211; Multicore support, resource sharing support, …<br>&#8211; Low power reconfigurable architectures, …<br>&#8211; Networks on chip tailored for reconfigurable architectures, …<br>&#8211; Dynamic and run&#8211;time reconfiguration,<br>&#8211; Defect and Fault Tolerance<br>Reconfigurable Tools and Technologies:<br>&#8211; System level design and HW/SW co&#8211;design<br>&#8211; Static and dynamic power efficiency<br>&#8211; Modeling, optimization, technology mapping and design verification<br>&#8211; Design and debug of reconfigurable systems<br>&#8211; Testing, verification and benchmarking<br>&#8211; Dedicated compilers and high&#8211;level languages<br>&#8211; Operating system support for reconfigurability<br>&#8211; Impact of reconfigurable hardware on real&#8211;time performance<br>Reconfigurable Applications and Algorithms:<br>&#8211; Adaptive and bio inspired applications<br>&#8211; Domain&#8211;specific application, e&#046;g&#046; multimedia, bioinformatics, cryptography and more<br>&#8211; High&#8211;performance, high reliability and/or power efficient application acceleration<br>&#8211; Rapid prototyping<br>