EETimes This event is the only worldwide event fully dedicated to IPs (Intellectual Property) in electronic systems. The satisfaction level of the attendees is impressive due to well–focused, high–level panels, sessions and seminars. Over the years, IPs have become Subsystems or Platforms and thus, as a natural applicative extension, IP–SoC will definitively include a strong Embedded Systems track addressing a continuous technical spectrum from IP to SoC to Embedded System.<br>Areas of interest:<br>IP Best practice<br>– Business models<br>– IP Exchange, reuse practice and design for reuse<br>– IP standards & reuse<br>– Collaborative IP based design<br>Design<br>– DFM and process variability in IP design<br>– IP / SoC physical implementation<br>– IP design and IP packaging for Integration<br>Quality and verification<br>– IP / SoC verification and prototyping<br>– IP / SoC quality assurance<br>Architecture and System<br>– IP based platform<br>– FPGA SoC<br>– IP / SOC transaction level modelling<br>– HW/SW integration<br>– System–level Prototyping & virtual prototyping<br>– Multi processor and Network on Chip<br>Embedded Software<br>– IP based platfrom<br>– Middelware<br>– O.S<br>Reliability, Real–Time and Fault Tolerant Systems<br>– IP reliability computation<br>– Security IP<br>– Real–time or Embedded Computing Platforms<br>– Real–time Operating system<br>
Abbrevation
IP-SOC
City
Grenoble
Country
France
Deadline Paper
Start Date
End Date
Abstract