FDL is an international forum to exchange experiences and promote new trends in the application of languages, their associated design methods and tools for the design of electronic systems. FDL stimulates scientific and controversial discussions within and in–between scientific topics as described below. The program structure includes research working sessions, embedded tutorials, panels, and technical discussions. The Forum includes tutorials, and fringe meetings, such as user group or standardization meetings.<br>“Wild and Crazy Ideas†are welcome.<br>Authors are invited to submit manuscripts on topics including, but not limited to:<br>Formalisms & Languages for …<br>Requirements and Property specification (RSLs, PSLs, SVA, …)<br>Multi–physics specification (timing, power, temperature, aging, …)<br>Multi–domain parallel applications in dynamic real–time environments<br>Models of computation<br>Automata (xFSM, …)<br>Networks (Process Networks, Petri Nets, Task Networks, …)<br>Platform modelling and abstraction<br>Transaction level modelling<br>Run–time system and middleware abstraction<br>Model and component–based design (UML, SysML, MARTE, …)<br>Advanced language extensions for SLDLs (SystemC(–AMS), Modelica, …)<br>Tools & Techniques for efficient …<br>Formal property checking<br>Simulation of functional and extra–functional properties<br>Parallel simulation<br>High–level hardware and software synthesis<br>Testbench automation and cCoverage monitoring<br>Design space exploration and virtual prototyping<br>Scheduling & real–time analysis<br>Design Flows & Methodologies covering …<br>Horizontal and vertical virtual integration testing<br>Requirements engineering and traceability<br>Mixed critical embedded applications on multi–core multi–CPU SoCs<br>Power and performance<br>Safety and security<br>Heterogeneous component integration<br>Multi–objective optimisation<br>
Abbrevation
FDL
City
Munich
Country
Germany
Deadline Paper
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