23rd International Workshop on Logic & Synthesis, San Francisco, Vereinigte Staaten

<font color="#ffffff" face="Arial,Helvetica,sans&#8211;serif"><p>Topics of interest include, but are not limited to: hardware synthesis and optimization; software synthesis; hardware/software co&#8211;synthesis; power and timing analysis; testing, validation and verification; synthesis for reconfigurable architectures; hardware compilation for domain&#8211;specific languages; design experiences&#046; Submissions on modeling, analysis and synthesis for emerging technologies and platforms are particularly encouraged&#046;</p> <p>The workshop format includes paper presentations, posters, invited talks, social lunch and dinner gatherings, and recreational activities&#046; Accepted papers are distributed only to IWLS participants&#046;</p></font>