The goal of the workshop is to present latest research in how hardware<br>and software (yet) unconventional for HPC is or can be used to reach<br>goals such as best performance per watt. UCHPC also covers according<br>programming models, compiler techniques, and tools. Thus, suggested<br>topics for papers include, but are not limited to the following:<br>* Innovative use of hardware and software unconventional for HPC<br>* HPC applications or visualizations in connection with HPC on GPUs<br>(GPGPU), using GPUs embedded on processor dies (as found in AMD<br>Fusion/APUs, NVidia Denver, Intel Ivy Bridge), Intel′s MIC and SCC,<br>low power/embedded processors (including DSPs, Adapteva Epiphany),<br>FPGAs (e.g. Convey), Tilera′s tile–based many–core processors, IBM<br>Cell BE, accelerators, visualization cards, etc.<br>* Cluster/Grid solutions using unconventional hardware, e.g. clusters of<br>game consoles, nodes using GPUs, Low Power/Embedded Processors,<br>MPSoCs, new many–cores from Intel and/or ARM designs, Mac<br>Minis/AppleTVs, FPGAs etc.<br>* Heterogeneous computing on hybrid platforms<br>* Work on and use of new programming models and paradigms needed to<br>support unconventional hardware, and hybrid/hierarchical combinations<br>with more conventional systems. Examples are OpenACC, OpenCL, Cilk+,<br>and task–based approaches for heterogeneous systems<br>* Performance and scalability studies in HPC using unconventional<br>hardware<br>* Reconfigurable computing for HPC<br>* Performance modeling, analysis and tools for HPC with unconventional<br>hardware<br>* New/modified or unconventional programming models for HPC, including<br>e.g. PGAS or task–based concepts<br>* Big data and/or deep learning using unconventional HPC hardware or<br>software<br>
Abbrevation
UCHPC
City
Porto
Country
Portugal
Deadline Paper
Start Date
End Date
Abstract