ATS’15 also invites 1 page proposals for presentations on <font style="font–weight:bold"> state–of–the–art test topics and practices</font> in the industry track. Proposals for individual presentations or a full session should include the title of each presentation, a brief abstract, bio of the speaker (s), and approval status for participation at ATS.<br>All the submissions including the industry track can be done at ATS – 2015 submission <a href="https://easychair.org/conferences/?conf=ats15" target="_bank"> site </a>. <p style="font–size:120%;color:#00001F"> The topics of interest includes(but not limited to):<br></p> <table> <tbody><tr style="font–style:normal; font–family:Arial, Helvetica,sans–serif"> <td valign="top" width="50%"> Test generation & fault simulation<br>Fault diagnosis<br>Memory testing and FPGA testing<br>Delay fault testing/Low power testing<br>System–on–a–chip–test/System–in–package test<br>Software testing / verification<br>Failure analysis / fault modeling<br>Fault tolerance/error correction<br>IDDQ testing<br>Test standard: IEEE 1500, boundary scan<br>Automatic test equipment<br>Testing of adaptive circuits and systems<br></td> <td valign="top" width="50%"> DfX: Design for testability,reliability,dependability<br>Analog & mixed–signal/RF/IO testing<br>Wafer–level testing<br>Board and system testing/On–line testing<br>Network–on–a–chip testing<br>CPU testing<br>Built–in self–test/Embedded testing<br>Functional testing<br>Test economics<br>Test experience in industry<br>Yield Enhancement/Silicon debug<br>System level testing<br></td> </tr> </tbody></table><br>
Abbrevation
ATS
City
Bombay
Country
India
Deadline Paper
Start Date
End Date
Abstract